CPP-GMR heads are considered to be promising candidates for ultra-high density magnetic recording. In a typical CPP-GMR head structure, a bottom synthetic spin valve type film stack is used for biasing reasons, together with a conventional CoFe/NiFe composite free layer, following traditions derived from CIP (current in plane) GMR (giant magneto-resistance) developments.
Two different configurations are possible for a CPP-GMR structure. The older of these is a “metallic” CPP-GMR, in which the spacer is a Cu layer. A typical structure this type would look as follows:Seed/AFM/AP2/Ru/AP1/Cu/free layer/capping layerwhere AFM is the antiferromagnetic layer and AP1 and AP2 are anti-parallel layers.
The other more recent configuration is the CCP version in which the current path through the Cu spacer is restricted to narrow zone 11 which is embedded in insulation 12, as illustrated schematically in FIG. 1. Layer 12 is an example of a NOL (nano-oxide layer). Incorporation of a current confining scheme of this type serves to further improve the performance of a CPP GMR device. A typical structure of this type would look as follows:Seed/AFM/AP2/Ru/AP1/Cu/CCP-layer/Cu/free layer/capping layer
In practice, an approximation of the idealized structure seen in FIG. 1 is realized, as illustrated, in FIG. 2a, by first laying down layer of copper 21 followed by layer 22 of either AlCu or pure Al. This structure is then subjected to PIT (plasma ion treatment), as illustrated in FIG. 2b, which causes conductive regions 23 to precipitate out as conductive paths through the remaining material. The process concludes, as shown in FIG. 2c, with the application of IAO (ion assisted oxidation) which oxidizes the more chemically active regions, converting them to dielectric 26 (aluminum oxide in this example) while leaving in place conductive regions 23. The latter are relatively pure copper. It is important to note that conductive regions 23 tend to be needle-like, as in regions 24, or butt-ended as in regions 25.
In earlier work, CCP-CPP GMR performance was greatly enhanced through improvements in AP1 and the free layer together with optimization of the PIT and IAO processes. However, some concern remains as to the uniformity of these CCP-CPP GMR designs.
A CCP-CPP GMR wafer that is representative of current designs, would have a film structure as follows:Ta10/Ru10/IrMn70/Fe10% Co8/Fe70% Co10.5/Fe10% Co16/Ru7.5/Fe70% Co12/Cu2/Fe70% Co12/Cu5.2/AlCu8.6/PIT(20 w,35 sec)/IAO(27 W,40 sec)//Cu3//CoFe12/NiFe35/Ru10/Ta60/Ru30
where a thin Ta/Ru layer has been employed as the seed layer, IrMn as the AFM material, FCC-like CoFe/FeCo/FeCo tri-layer structure as the AP2 layer, FeCo with Cu insertion as the AP1 layer, Fe25% Co/CoFeB/Ni90% Fe as the free layer and a Ru/Ta/Ru trilayer as the capping layer.
The most critical part of this CCP-CPP GMR sensor, the current confining path, was realized through the steps of Cu/AlCu/PIT/IAO/Cu. After bottom Cu deposition, a thin AlCu layer is deposited thereon. This AlCu layer is then exposed to oxygen by means of the PIT/IAO process to form a current confining path through Al2O3 and Cu segregation. It is well known that Al atoms have different mobility from Cu atoms. After the PIT treatment, Al and Cu start to segregate from each other. Once they are exposed to oxygen, Al atoms attract oxygen and form amorphous AlOx. Since Cu is chemically more inert to O2 than Al under the current process conditions, it tends to remain as a Cu metal phase. Thus, throughout the PIT/IAO process the Al will be continuously oxidized to AlOx while the Cu remains in a metallic state, eventually forming metal paths in the form of copper filaments.
Since the PIT/IAO processes are performed through the top surface of the AlCu layer, it inevitably results in a large variety of Cu metal path types, from top to bottom and across the whole wafer, causing large variations across the wafer in R.A and dR/R for all devices. Some metal paths will be needle-like with a very narrow path from top to bottom, especially near the top. Such a needle-like metal path will typically cause a higher R.A as well as a slightly larger dR/R. Also, some metal paths will be butte like, which will result in a lower R.A and dR/R. Between these extremes there will be spear-like metal paths with intermediate R.A and dR/R. It is readily deduced that that it is these large variations in the shapes of the metal paths that cause the uniformity problems.
To investigate further, a reference CPP-GMR sensor with the following film structure was formed using the conventional PIT/IAO process. Each value next to the individual layer indicates the film thickness in angstroms:Ta10/Ru10/IrMn70/Fe10% Co8/Fe70% Co10.5/Fe10% Co16/Ru7.5/Fe70% Co12/Cu2/Fe70% Co12/Cu5.2/AlCu8.6/PIT(20 w,35 sec)/IAO(27 W,40 sec)//Cu3/CoFe12/NiFe35/Ru10/Ta60/Ru30
The uniformity data (displayed as 1 sigma in percentage) for dR/R, dR and R across the wafer are shown in Table 1. Typically under the conventional PIT/IAO process, the dR/R uniformity averaged about 9.5% (1 sigma), dR uniformity averaged about 24.7%, and R averaged about 18.2%, all due to the large variations of Cu metal path difference. Optimizing and homogenizing these Cu paths is thus the key to improving wafer uniformity.
TABLE 1dR/R, dR and R uniformity data for various device sizes forstructures formed using the conventional PIT/IAO processfree layerChiplengthAreadR/RdRRsite(μm)(μm)2uniformityuniformityuniformity#10.610.2911.225.315.7#20.490.198.722.616.7#30.800.5212.123.813.7#40.370.119.026.520.0#50.300.077.426.420.9#60.240.058.823.622.3mean0.470.219.524.718.2
The present invention discloses a process, and related structure, that significantly improve the uniformity of CCP-CPP designs.
A routine search of the prior art was performed with the following references of interest being found:
U.S. Pat. No. 7,050,276 (Nishiyama) discloses forming a current limiting layer of Al on a non-magnetic layer, plasma oxidation of the Al layer, and then filling the holes with a conductive layer. U.S. Pat. No. 7,046,489 (Kamiguchi et al) teaches a resistance-regulating layer such as Al—Co that is oxidized such as by plasma oxidation to form pinholes. U.S. Patent Application 2006/0098353 (Fukuzawa et al) teaches PIT or IAO oxidation of AlCu. U.S. Patent Application 2006/0007605 ILi et al—Headway) shows IAO of an AlCu layer.
U.S. Patent Application 2005/0002126 (Fujiwara et al) discloses a current-confining layer structure formed of a conductor and an insulator. The conductor may be Al, Mg, Cr, Cu, etc. U.S. Patent Application 2005/0152076 (Nagasaka et al) teaches that oxidation of a magnetic layer results in a current-confining effect. Oxidation of a magnetic intermediate layer such as CoFe between two layers of Cu is taught.
U.S. Patent Applications 2005/0094317 (Funayama) and 2005/0052787 (Funayama et al) shows a current control region comprising AlOx and Cu. Mg or Cr could be used with a copper content of 1% to 50%. U.S. Patent Application 2004/0190204 (Yoshikawa et al) shows an intermediate layer comprising Cu/oxidized AlCu/Cu where AlCu is oxidized by IAO.